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| IPD50N03S2-07 OptiMOS(R) Power-Transistor Features * N-channel - Enhancement mode * Automotive AEC Q101 qualified * MSL1 up to 260C peak reflow * 175C operating temperature * Green package (lead free) * Ultra low Rds(on) * 100% Avalanche tested Product Summary V DS R DS(on),max ID 30 7.3 50 V m A PG-TO252-3-11 Type IPD50N03S2-07 Package PG-TO252-3-11 Marking PN0307 Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current1) Symbol ID Conditions T C=25 C, V GS=10 V T C=100 C, V GS=10 V2) Pulsed drain current2) Avalanche energy, single pulse Gate source voltage Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS V GS P tot T j, T stg T C=25 C T C=25 C I D=50A Value 50 50 200 250 20 136 -55 ... +175 55/175/56 mJ V W C Unit A Rev. 1.0 page 1 2006-07-18 IPD50N03S2-07 Parameter Symbol Conditions min. Values typ. max. Unit Thermal characteristics2) Thermal resistance, junction - case Thermal resistance, junction ambient, leaded SMD version, device on PCB R thJC R thJA R thJA minimal footprint 6 cm2 cooling area3) Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D= 1 mA V GS(th) I DSS V DS=V GS, I D=85 A V DS=30 V, V GS=0 V, T j=25 C V DS=30 V, V GS=0 V, T j=125 C2) Gate-source leakage current Drain-source on-state resistance I GSS RDS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=50 A, 30 2.1 3.0 0.01 4.0 1 A V 1.1 100 75 50 K/W - 1 1 5.7 100 100 7.3 nA m Rev. 1.0 page 2 2006-07-18 IPD50N03S2-07 Parameter Symbol Conditions min. Values typ. max. Unit Dynamic characteristics2) Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode continous forward current2) Diode pulse current2) Diode forward voltage IS I S,pulse V SD T C=25 C V GS=0 V, I F=50 A, T j=25 C V R=15 V, I F=I S, di F/dt =100 A/s V R=15 V, I F=I S, di F/dt =100 A/s 0.9 50 200 1.3 V A Q gs Q gd Qg V plateau V DD=24 V, I D=50 A, V GS=0 to 10 V 11 27 52 5.2 68 V nC C iss C oss Crss t d(on) tr t d(off) tf V DD=15 V, V GS=10 V, I D=50 A, R G=6.8 V GS=0 V, V DS=25 V, f =1 MHz 2000 1200 630 18 40 26 30 ns pF Reverse recovery time2) t rr - 40 - ns Reverse recovery charge2) 1) Q rr - 50 - nC Current is limited by bondwire; with an R thJC = 1.1K/W the chip is able to carry 106A at 25C. For detailed information see Application Note ANPS071E at www.infineon.com/optimos 2) 3) Defined by design. Not subject to production test. Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 3 2006-07-18 IPD50N03S2-07 1 Power dissipation P tot = f(T C); V GS 6 V 2 Drain current I D = f(T C); V GS 10 V 160 140 60 50 120 40 100 P tot [W] 80 60 I D [A] 0 50 100 150 200 30 20 40 10 20 0 0 0 50 100 150 200 T C [C] T C [C] 3 Safe operating area I D = f(V DS); T C = 25 C; D = 0 parameter: t p 1000 4 Max. transient thermal impedance Z thJC = f(t p) parameter: D =t p/T 10 s 100 s 100 0.5 100 1 ms Z thJC [K/W] 0.1 I D [A] 10 -1 0.05 10 10-2 0.01 single pulse 1 0.1 1 V DS [V] 10 100 10-3 10-7 10-6 10-5 10-4 10-3 10-2 10-1 100 t p [s] Rev. 1.0 page 4 2006-07-18 IPD50N03S2-07 5 Typ. output characteristics I D = f(V DS); T j = 25 C parameter: V GS 200 6 Typ. drain-source on-state resistance R DS(on) = (I D); T j = 25 C parameter: V GS 19 10 V 7V 5.5 V 17 150 6.5 V 6V 15 RDS(on) [mW] 6.5 V I D [A] 100 13 6V 11 7V 5.5 V 50 9 5V 7 10 V 0 0 2 4 6 8 10 5 0 20 40 60 80 100 120 140 V DS [V] I D [A] 7 Typ. transfer characteristics I D = f(V GS); V DS = 6V parameter: T j 200 8 Typ. Forward transconductance g fs = f(I D); T j = 25C parameter: g fs 125 160 100 120 75 80 g fs [S] 50 40 25 C 175 C -55 C I D [A] 25 0 2 3 4 5 6 7 0 0 50 100 150 200 V GS [V] I D [A] Rev. 1.0 page 5 2006-07-18 IPD50N03S2-07 9 Typ. Drain-source on-state resistance R DS(ON) = f(T j) parameter: I D = 50 A; VGS = 10 V 12 10 Typ. gate threshold voltage V GS(th) = f(T j); V GS = V DS parameter: I D 4 3.5 10 R DS(on) [m] 8 V GS(th) [V] 3 83 A 415 A 2.5 6 2 4 -60 -20 20 60 100 140 180 1.5 -60 -20 20 60 100 140 180 T j [C] T j [C] 11 Typ. capacitances C = f(V DS); V GS = 0 V; f = 1 MHz 12 Typical forward diode characteristicis IF = f(VSD) parameter: T j 104 103 Ciss 102 C [pF] 10 3 Crss I F [A] 101 Coss 175 C 25 C 102 0 5 10 15 20 25 30 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V DS [V] V SD [V] Rev. 1.0 page 6 2006-07-18 IPD50N03S2-07 13 Typical avalanche energy E AS = f(T j) parameter: I D = 50A 270 240 14 Typ. gate charge V GS = f(Q gate); I D = 50 A pulsed 12 6V 24 V 10 210 180 8 E AS [mJ] V GS [V] 150 120 90 60 6 4 2 30 0 25 75 125 175 0 0 20 40 60 T j [C] Q gate [nC] 15 Typ. drain-source breakdown voltage V BR(DSS) = f(T j); I D = 1 mA 16 Gate charge waveforms 36 35 34 33 V GS Qg V BR(DSS) [V] 32 31 30 29 Q gate 28 Q gs Q gd 27 -60 -20 20 60 100 140 180 T j [C] Rev. 1.0 page 7 2006-07-18 IPD50N03S2-07 Published by Infineon Technologies AG Am Campeon 1-12 D-85579 Neubiberg (c) Infineon Technologies AG 1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices, please contact your nearest Infineon Technologies Office (www.infineon.com) Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact your nearest Infineon Technologies Office. Infineon Technologies' components may only be used in life-support devices or systems with the expressed written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2006-07-18 |
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